Stream high-speed data between FPGA and RT with a DMA FIFO
Efficiently transfer blocks of data between the RT and FPGA by direct memory access (DMA) first-in first-out (FIFO) buffers.
High throughput data transfer such as audio and signal waveforms
Exchange command and status messages through a first-in first-out (FIFO) buffer
Lossless transfer, e.g., when every data point matters
Ideal for high-speed data streaming
Use the “Invoke Method” function to configure, read, and write the DMA FIFO
Configure: request a FIFO depth and reports actual depth
Read: request number of elements to read; timeout says how long to wait for the FIFO to have this many values available; returns the data array and indicates the number of elements remaining to be read
Write: provide a data array to transfer and a timeout value to wait for sufficient space to be available to write this many elements; indicates the number of empty elements available
If using the NI myRIO 1950 or NI RIO Control Module start with the NI myRIO 1900 Archive.
Different IP address: Right-click on the "NI myRIO 1900" Device, choose "Properties", and then enter the new IP address
Right-click on the top of the project hierarchy, select "New Targets and Devices", keep the "Existing target or device" option, and then find and select your particular device
Select all of the components under the "NI myRIO 1900" device: click the first one and then shift+click the last one
Drag the selected components to the new device
Right-click the "NI myRIO 1900" device and select "Remove from project"
Connect an audio source to the Academic RIO Device “Audio In” jack and headphones or speakers to the “Audio Out” jack
Music from your phone is great
This online tone generator features sine, square, sawtooth, and triangle waveforms; adjust the volume as needed
Protect your hearing when using earbuds! Start with low volume!
Open “RT Main” and check for a broken “Run” arrow indicating that the FPGA bitfile must be recompiled; if a recompile is necessary, expand the LabVIEW project hierarchy (Chassis >> FPGA Target >> Build Specifications), right-click on the “FPGA Main” build specification and select “Rebuild”
Run “RT Main”:
The RT VI runs the supporting FPGA VI which samples the stereo audio input and streams audio frames (blocks of audio samples) to the RT for processing
The RT VI processes the entire frame at once by applying a variable gain and then streams the frames back to the FPGA
The FPGA VI applies the processed frames to the audio output
audio sampling rate: sets the FPGA sampling rate in kilo-samples per second
audio frame size: sets the number of audio samples for each DMA transfer
gain: gain factor applied to the audio: 0dB is no change, +dB boosts the level, and -dB cuts the level
minimum loop time: increase this value to artificially extend the processing loop time to illustrate the effect of buffer overflow
depth: number of FIFO elements
elements remaining: number of FIFO elements yet to be transferred from FPGA to RT
overflow: FPGA upstream FIFO buffer is full and unable to accept a new audio input sample
underflow: FPGA downstream FIFO buffer is empty and unable to produce the needed audio output sample
maximum loop time: The maximum allowed time to keep up with the rate at which the FPGA produces and consumes audio sampled; the value in milliseconds is frame size (S/frame) divided by sampling rate (kS/s)
measured loop time: displays the total time that the RT spends waiting for a new audio frame, processing it, and then transferring back to the FPGA
processed audio: waveform chart display of the left (blue) and right (red) processed audio signal; right-click and choose Chart History Length to change the buffer size from default of 1024 samples
audio sampling interval: indicates the corresponding sampling interval in microseconds
according to the “audio sampling rate” control, streams the audio to the RT which applies simple processing (adjusting the gain), and then streams the processed audio back to the FPGA to be played on the audio output
Experiment with parameters to see the effects of different frame sizes, audio sampling rates, and minimum loop time
Increase the minimum loop time beyond the maximum allowed loop time and listen for the effects of FIFO overflow; use a sine tone to most clearly hear the noise, but you can also discern this with regular music, too.