FPGA inter-process communication

Summary

• Inter-process communication refers to data exchanges between two process loops running in parallel on a given target
• Two basic techniques for tagTransfer only the current (most recent) data value between two process loops or between two targets / latest valueTransfer only the current (most recent) data value between two process loops or between two targets communication are presented here (LabVIEW FPGA supports additional techniques including memory items, register items, flip-flop FIFOs, look-up table FIFOs, and block memory FIFOs)
• Note that many of the RT-based inter-process communication techniques apply to the FPGA target, as well

Code examples

• Local variable
• Global variable