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FPGA code example

Xilinx IP integration

Configure and use Xilinx IP (intellectual property) modules designed specifically for the Xilinx Zynq FPGA

LabVIEW FPGA block diagram subpalette for Xilinx IP functions

Use cases


Keep in mind

LabVIEW block diagram elements

Locate these elements with "Quick Drop" (press Ctrl+Space and start typing the name); click on an icon to see more sample code that uses that element:

Binary Counter
Single-Cycle Timed Loop

Example code

Expected results

https://youtu.be/VIW5z_Dn1QA (0:39)

Developer walk-through

https://youtu.be/E2-aMAt1Cm8 (3:48)


For more information

Integrating Third-Party IP (FPGA Module) (https://zone.ni.com/reference/en-XX/help/371599K-01/lvfpgaconcepts/integrating_hdl/)
Additional details regarding how VHDL and other source types may be imported into the block diagram.