Summary

• The Academic RIO Device Toolkit consists of two components:

  • Express VIs and low-level VIs to interact with external I/O and onboard devices
  • Default Device personality (FPGA bitfile) that manages the external I/O details and implements useful functionality such as PWM, quadrature-encoded waveform decoding, and serial bus protocols (SPI and I2C)

• By using the Academic RIO Device Toolkit VIs, developers can easily create complete applications by programming the RT target exclusively; for example, all of the code examples in the NI myRIO Project Essentials Guide and the NI myRIO Vision Essentials Guide take this programming approach.

• Select the “View Code” tab of the Express VI configuration dialog box to see the underlying implementation with the Academic RIO Device Toolkit low-level VIs.

Analog In

• Read from up to four analog input channels on each of the MXP connectors, up to two channels on the MSP connector, and either or both of the two audio input channels (12 channels altogether)
• 1-sample mode: simultaneously read one sample from each of up to 12 channels per call
• N-sample mode (only available with custom FPGA personality or Academic RIO Device high throughput personality):
  • Read a single channel of up to 10000 samples at a sample rate of 1 to 50 kHz per call
  • Unbuffered, therefore, waveform gaps will exist between blocks of samples acquired by repeated calls

Analog Out

• Write up to two analog input channels on each of the MXP and MSP connectors, and either or both of the two audio output channels (8 channels altogether)
• 1-sample mode: simultaneously write one sample to each of up to 8 channels per call
• N-sample mode (only available with custom FPGA personality or Academic RIO Device high throughput personality):
  • Write a single channel at a sample rate of 1 to 80 kHz per call; an option exists to cause the Express VI to wait until all of the samples have been written to the analog output
  • Unbuffered, therefore, waveform gaps will exist between blocks of samples generated by repeated calls

Digital In

• Read from up to 16 digital input channels on each of the MXP connectors and up to 8 channels on the MSP connector (40 channels altogether)
• 1-sample mode: simultaneously read one sample from each of up to 11 channels per call
• N-sample mode (only available with custom FPGA personality or Academic RIO Device high throughput personality):
  • Read a single channel of up to 10000 samples at a sample rate of 1 to 8000 kHz per call
  • Unbuffered, therefore, waveform gaps will exist between blocks of samples acquired by repeated calls

Digital Out

• Write up to 16 digital input channels on each of the MXP connectors and up to 8 channels on the MSP connector (40 channels altogether)
• 1-sample mode: simultaneously write one sample to each of up to 11 channels per call
• N-sample mode (only available with custom FPGA personality or Academic RIO Device high throughput personality):
  • Write a single channel at a sample rate of 1 to 8000 kHz per call; an option exists to cause the Express VI to wait until all of the samples have been written to the digital output
  • Unbuffered, therefore, waveform gaps will exist between blocks of samples generated by repeated calls

Button

• Read the Boolean value of the Academic RIO Device user button, a non-latching push switch (true when pressed)
• The button signal is debounced, i.e., generates a single transition per button press.

LED

• Write up to four Boolean values to the four onboard LEDs per call.

Accelerometer

• Read one, two, or all three axes of the onboard accelerometer. The Express VI returns double-precision floating point values calibrated in “gees”.

PWM

• Generate a single pulse-width modulated output signal on any of the three PWM outputs on each of the MXP connectors or on any two outputs of the MSP connector (8 total)
• Duty cycle adjustable between 0 and 100%
• Frequency adjustable between 40 Hz and 40 kHz
• The FPGA continually produces the PWM waveform, i.e., the RT target plays no role other than to set the desired parameter values

Encoder

• Decode the rotation counts and direction produced by a quadrature-encoded waveform pair
• The FPGA continually monitors the quadrature-encoded waveform pair and manages the decoding process so as not to miss any waveform edges; calling the Express VI simply returns the current counter value and direction

SPI

• SPI = Serial Peripheral Interface serial communication
• Write, read, or write/read frames of between 4 to 16 bits
• Works with 16-bit unsigned integer data type regardless of selected bits per frame
• Serial clock frequency between 40 Hz and 4 MHz
• Advanced options include selectable clock phase and polarity as well as data direction (most significant bit first or least significant bit first)

I2C

• I2C = Inter-IC serial communication
• Write, read, or write/read one or more bytes per call
• Supports standard mode (100 kbps) and fast mode (400 kbps)

UART

• UART = Universal Asynchronous Receiver Transmitter
• Read or write character strings
• Can read one character at a time or all available characters
• Select among twelve baud rates between 110 and 230400 baud
• Select 7 or 8 data bits
• Select parity as none, even, or odd
• Choose 1 or 2 stop bits
• Handled directly by the RT processor… the FPGA is not involved

Interrupt

• Configure one of three types of interrupt events:
  • Timer
  • Analog input threshold crossing (two available, MXP-A AI0 and AI1)
  • Digital input transition (five available: MXP-A DIO0 through DIO3 and onboard button)
  • Runs a designated VI (“callback VI”) when the interrupt event occurs
  • Up to eight interrupt request (IRQ) sources may be configured
  • Digital transitions can be either falling edge, rising edge, or both edges; the number of edges required to generate an interrupt is adjustable, too
  • Analog transitions can be either falling edge or rising edge through the user-selectable threshold voltage (between 0 and 5 volts)

For more information

1. Getting Started with the myRIO Toolkit (http://zone.ni.com/reference/en-XX/help/373925C-01/myriohelp/myrio_get_started)
   Software installation, setting up myRIO, myRIO programming tutorials, and creating your myRIO application.
   

Related content

Tags:

• Academic RIO
• myRIO
• FPGA
• RT
• PC host
• myRIO Toolkit
• FPGA personality

Targets:

• RT