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RIO Developer Essentials Guide for Academia

"Headless" tag

Screenshot of LabVIEW VI block diagram and front panels of 'RT Main' and 'PC Main'

Make your first RT application
RT procedure

Follow along with this step-by-step tutorial to make a "hello, world!"-like application to experience the advantages of multiple linked VIs running simultaneously on the real-time (RT) target and desktop computer: (1) "RT Main" runs as the RT target start-up VI, blinks the onboard LEDs, and reads the onboard button; these onboard devices physically connect to the FPGA I/O pins which are accessed with the Academic RIO Device Toolkit Express VIs and default FPGA personality, and (2) "PC Main" VI runs on the desktop computer as a user-friendly human-machine interface (HMI) for remote command and control of "RT Main" through the network via shared variables hosted on the RT target.

Screenshot of LabVIEW VI block diagram and front panel of 'FPGA Main'

Make your first FPGA application
FPGA procedure

Follow along with this step-by-step tutorial to make a "hello, world!"-like application to experience the advantages of multiple linked VIs running simultaneously on the FPGA target, real-time (RT) target, and desktop computer: (1) "FPGA Main" VI blinks the onboard LEDs and reads the onboard button; these onboard devices physically connect to the FPGA I/O pins, (2) "FPGA testbench" VI runs on the desktop computer for interactive development and debugging of "FPGA Main" in simulation mode prior to compiling to a bitstream file, (3) "RT Main" VI runs as the RT target start-up VI; it runs "FPGA Main", interacts with its front-panel controls/indicators, and communicates with an external desktop computer via network-published shared variables, and (4) "PC Main" VI runs on the desktop computer as a user-friendly human-machine interface (HMI) for remote command and control of "FPGA Main" through the network.

LabVIEW RT block diagram snippet: Open a datalog file, get onboard accelerometer measurement, log the measurement to a file, and close the file

Headless datalogger and file I/O
RT code

Monitor process variables and sensor measurements, timestamp them, and log them to a file, and then remote access the datalog file through the network with WebDAV, web browser, or VI running on a PC host.

LabVIEW RT block diagram snippet: Read a single-process shared variable in one process loop that was written by another process loop

Single-process shared variable (SPSV)
RT code

A single-process shared variable (SPSV) behaves like a global variable that links deterministic and non-deterministic process loops, effectively shielding the deterministic loop from elements that contribute jitter.

LabVIEW RT block diagram snippet: RT and PC read and write the same network-published shared variables

Network-published shared variable (NPSV)
RT code PC code

A network-published shared variable (NPSV) behaves like a global variable that links process loops residing in two or more network-connected targets.

LabVIEW RT block diagram snippet: RT opens a handle to a network-published shared variable and reads its value

Programmatically access a network-published shared variable (NPSV)
RT code PC code

Use the NPSV programmatic API (application programmer's interface) VIs as an alternative method to a shared variable node.

LabVIEW RT block diagram snippet: RT writes blocks of data to a network stream channel, PC reads the blocks from the same channel

Stream high-speed data through a network stream channel
RT code PC code

Efficiently transfer blocks of data between the RT and PC by network streams.