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RIO Developer Essentials Guide for Academia

"Timed Loop" element

Timed Loop

Follow along with this step-by-step tutorial to make a "hello, world!"-like application to experience the advantages of multiple linked VIs running simultaneously on the real-time (RT) target and desktop computer: (1) "RT Main" runs as the RT target start-up VI, blinks the onboard LEDs, and reads the onboard button; these onboard devices physically connect to the FPGA I/O pins which are accessed with the Academic RIO Device Toolkit Express VIs and default FPGA personality, and (2) "PC Main" VI runs on the desktop computer as a user-friendly human-machine interface (HMI) for remote command and control of "RT Main" through the network via shared variables hosted on the RT target.

Timed loop
RT code

Use the "Timed Loop" to create a deterministic process loop, i.e., a loop that runs with a precisely-defined time per iteration.
Use the "Tick Count" function to measure the total elapsed time per iteration of a process loop.